SPHBM4 standard approved, breaking through the expensive packaging cost bottleneck of HBM.

date
24/06/2026
JEDEC has developed and published the SPHBM4 standard. The SPHBM4 is a new JEDEC standard that achieves performance close to HBM4 with fewer signal pins, standard packaging, and more affordable substrates. By reducing the number of signal pins to one-fifth of the original and increasing signal speed by four times, SPHBM4 mitigates performance loss issues. This allows for achieving bandwidth similar to HBM even with standard substrates. The distance between memory chips and computing chips has also increased to 20 millimeters. This increase in distance helps improve thermal performance within the packaging.